Connector Pinout Diagram Builder
Build a two-connector pinout SVG and complete wiring schedule from your explicit pin inventories and one-to-one connections.
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How to use Connector Pinout Diagram Builder
Document an original small adapter without guessing its pin assignments. Supply the pins on each side and name every intended link. The diagram and schedule retain all source identities, including pins you leave open.
- Enter connector A and B names and 1–20 pins on each side, in the top-to-bottom order you want to document. Give every pin a unique short string ID and a literal signal description.
- Declare 1–20 named from/to links. Each A pin and each B pin may appear in at most one link. References must exist; unmapped pins remain open rather than disappearing.
- Inspect the SVG and full schedule, then download SVG, HTML, CSV or JSON. Verify the source pin assignments and actual hardware orientation against your own device documentation.
Good to know
- This profile has exactly two independent pin inventories, each with 1–20 pins. Pin IDs are 1–8 ASCII letters, digits, underscore, dot or hyphen, with case and leading zeros preserved. Connector names have at most 32 UTF-16 code units; signal and wire names at most 80. All text is literal, nonblank and free of controls or invalid XML characters.
- Every pin may belong to zero or one wire. At least one wire is required; dangling references, duplicate endpoint use, missing fields and unsupported keys refuse the complete model. Repeated signal or wire names are allowed as descriptions and never connect separate pins. Branches, splices, buses, shields, multi-drop nets and implicit same-name connections are outside the model.
- Pin order is the order you enter. The fixed two-column drawing is a logical map, not a front/rear view, mating-face drawing, dimensional connector model, device-standard pinout or CAD file. Curves stay between the port columns and may cross; crossings are not junctions. Wire IDs pair the endpoints and the schedule is the authoritative connection record.
- No electrical-rule, polarity, power, current, voltage, protocol, mechanical fit or component rating is verified. No wire length or purchasing estimate is calculated. The SVG uses a bounded 600 by at most 636 unit viewport with ordinary unscaled glyphs. Font support, crowded crossings, rendering, print pagination and physical hardware verification require inspection.
- CSV includes connected links followed by all open A and B pins. Quoted cells preserve commas and quotes; formula-like values are apostrophe-prefixed for spreadsheet exposure reduction. This changes that CSV representation only; original literal strings remain in the report. This is not a general spreadsheet execution guarantee.
- Browser-local processing, with no upload, persistence, external resources or code execution. Model JSON is limited to 30,000 characters, 10,000 values and 18 levels. Generated HTML is capped at 750,000 characters, SVG at 50,000, pin schedule CSV at 35,000 and the complete report at 1,000,000. The downloaded artifact must be inspected in the target browser and print setup.
Common questions
Do two pins with the same signal label connect automatically?
No. Only a declared from/to row creates a wire between connector A and B. Equal names are literal descriptions; separate pins remain separate unless explicitly mapped. Path crossings also add no connection. Open pins remain in the diagram and schedule.
Are my inputs uploaded or retained?
No. Computation and artifact construction stay in the current browser tab. Downloads are local files; no outside data service, storage or account is required.
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